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1

Yield analysis for self-repairable MEMS devices

Xingguo Xiong, Yu-Liang Wu, Wen-Ben Jone

Journal:

Analog Integrated Circuits and Signal Processing

Year:

2008

Language:

english

File:

PDF, 467 KB

english, 2008

2

On testing of sequential machines using circuit decomposition and stochastic modeling

Das, S.R., Wen-Ben Jone, Nayak, A.R., Choi, I.

Journal:

IEEE Transactions on Systems Man and Cybernetics

Year:

1995

Language:

english

File:

PDF, 1.36 MB

english, 1995

3

Charge-sharing alleviation and detection for CMOS domino circuits

Shih-Chieh Chang, Ching-Hwa Cheng, Wen-Ben Jone, Shin-De Lee, Jinn-Shyan Wang

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2001

Language:

english

File:

PDF, 364 KB

english, 2001

4

Launch-on-Shift Test Generation for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains

Wu, Shianling, Wang, Laung-Terng, Wen, Xiaoqing, Jone, Wen-Ben, Hsiao, Michael S., Li, Fangfang, Li, James Chien-Mo, Huang, Jiun-Lang

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2012

Language:

english

File:

PDF, 1.30 MB

english, 2012

5

Analysis of Hamming count compaction scheme

Wen-Ben Jone, Anita Gleason

Journal:

Journal of Electronic Testing

Year:

1991

Language:

english

File:

PDF, 916 KB

english, 1991

6

Multiple-output parity bit signature for exhaustive testing

Wen-Ben Jone, Sunil R. Das

Journal:

Journal of Electronic Testing

Year:

1990

Language:

english

File:

PDF, 281 KB

english, 1990

7

Fault Modeling and Analysis for Resistive Bridging Defects in a Synchronizer

Hyoung-Kook Kim, Wen-Ben Jone, Laung-Terng Wang

Journal:

Journal of Electronic Testing

Year:

2010

Language:

english

File:

PDF, 861 KB

english, 2010

8

An adaptive path selection method for delay testing

Wen-Ben Jone, Wu-Sung Yeh, Chingwei Yeh, Das, S.R.

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

2001

Language:

english

File:

PDF, 158 KB

english, 2001

9

Data compression in space under generalized mergeability based on concepts of cover table and frequency ordering

Das, S.R., Jing Yi Liang, Petriu, E.M., Assaf, M.H., Wen-Ben Jone, Chakrabarty, K.

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

2002

Language:

english

File:

PDF, 778 KB

english, 2002

10

Fault tolerance in systems design in VLSI using data compression under constraints of failure probabilities

Das, S.R., Ramamoorthy, C.V., Assaf, M.H., Petriu, E.M., Wen-Ben Jone

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

2001

Language:

english

File:

PDF, 496 KB

english, 2001

11

CACOP-a random pattern testability analyzer

Wen-Ben Jone, Das, S.R.

Journal:

IEEE Transactions on Systems Man and Cybernetics

Year:

1995

Language:

english

File:

PDF, 677 KB

english, 1995

12

Using Launch-on-Capture for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains

Shianling Wu, Laung-Terng Wang, Xiaoqing Wen, Zhigang Jiang, Lang Tan, Yu Zhang, Yu Hu, Wen-Ben Jone, Hsiao, M.S., Li, J.C.-M., Jiun-Lang Huang, Lizhen Yu

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2011

Language:

english

File:

PDF, 410 KB

english, 2011

13

[IEEE 2008 IEEE National Aerospace and Electronics Conference - Dayton, OH, USA (2008.07.16-2008.07.18)] 2008 IEEE National Aerospace and Electronics Conference - Fault Modeling and Analysis for Bridging Defects in a Synchronizer

Kim, Hyoung-Kook, Jone, Wen-Ben

Year:

2008

Language:

english

File:

PDF, 209 KB

english, 2008

14

Using Launch-on-Capture for Testing BIST Designs Containing Synchronous and Asynchronous Clock Domains

Laung-Terng Wang, Xiaoqing Wen, Shianling Wu, Furukawa, H., Hao-Jan Chao, Boryau Sheu, Jianghao Guo, Wen-Ben Jone

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2010

Language:

english

File:

PDF, 709 KB

english, 2010

15

[ACM Press the 43rd annual conference - San Francisco, CA, USA (2006.07.24-2006.07.28)] Proceedings of the 43rd annual conference on Design automation - DAC '06 - DyXY

Li, Ming, Zeng, Qing-An, Jone, Wen-Ben

Year:

2006

Language:

english

File:

PDF, 566 KB

english, 2006

16

Location Cache Design and Performance Analysis for Chip Multiprocessors

Nemeth, J., Rui Min, Wen-Ben Jone, Yiming Hu

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2011

Language:

english

File:

PDF, 1.61 MB

english, 2011

17

Multiple fault detection in parity checkers

Wen-Ben Jone, Cheng-Juei Wu

Journal:

IEEE Transactions on Computers

Year:

1994

Language:

english

File:

PDF, 492 KB

english, 1994

18

A coordinated circuit partitioning and test generation method for pseudo-exhaustive testing of VLSI circuits

Wen-Ben Jone, Papachristou, C.A.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1995

Language:

english

File:

PDF, 1.19 MB

english, 1995

19

Timing optimization by gate resizing and critical path identification

Chen-Liang Fang, Wen-Ben Jone

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1995

Language:

english

File:

PDF, 1.67 MB

english, 1995

20

Pseudorandom test-length analysis using differential solutions

Dan Li, Wen-Ben Jone

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1996

Language:

english

File:

PDF, 1.08 MB

english, 1996

21

TAIR: testability analysis by implication reasoning

Shih-Chieh Chang, Wen-Ben Jone, Shi-Sen Chang

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2000

Language:

english

File:

PDF, 270 KB

english, 2000

22

A parallel built-in self-diagnostic method for embedded memory arrays

Der-Cheng Huang, Wen-Ben Jone

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2002

Language:

english

File:

PDF, 476 KB

english, 2002

23

Turbo1500: Core-Based Design for Test and Diagnosis

Laung-Terng Wang, Apte, R., Shianling Wu, Boryau Sheu, Wen-Ben Jone, Jianghao Guo, Kuen-Jong Lee, Wei-Shin Wang, Xiaoqing Wen, Hao-Jan Chao, Jinsong Liu, Yanlong Niu, Yi-Chih Sung, Chi-Chun Wang, Fang

Journal:

IEEE Design & Test of Computers

Year:

2009

Language:

english

File:

PDF, 297 KB

english, 2009

24

[IEEE 2008 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTVS) - Cambridge, MA, USA (2008.10.1-2008.10.3)] 2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems - Material Fatigue and Reliability of MEMS Accelerometers

Xiong, Xingguo, Wu, Yu-Liang, Jone, Wen-Ben

Year:

2008

Language:

english

File:

PDF, 741 KB

english, 2008

25

[IEEE Comput. Soc. Press Tenth International Conference on VLSI Design - Hyderabad, India (4-7 Jan. 1997)] Proceedings Tenth International Conference on VLSI Design - Delay fault coverage enhancement using multiple test observation times

Wen-Ben Jone,, Yun-Pan Ho,, Das, S.R.

Year:

1997

Language:

english

File:

PDF, 485 KB

english, 1997

26

[IEEE 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) - New York City, NY, USA (2013.10.2-2013.10.4)] 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) - A cross-layer fault-tolerant design method for high manufacturing yield and system reliability

Guo, Jianghao, Han, Qiang, Jone, Wen-Ben, Wu, Yu-Liang

Year:

2013

Language:

english

File:

PDF, 1016 KB

english, 2013

27

[IEEE 7th International Conference on VLSI Design - Calcutta, India (5-8 Jan. 1994)] Proceedings of 7th International Conference on VLSI Design - On probabilistic testing of large-scale sequential circuits using circuit decomposition

Das, S.R., Wen-Ben Jone,, Nayak, A.R., Choi, I.

Year:

1994

Language:

english

File:

PDF, 440 KB

english, 1994

28

[IEEE 2008 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - San Jose, CA, USA (2008.11.10-2008.11.13)] 2008 IEEE/ACM International Conference on Computer-Aided Design - Accurate energy breakeven time estimation for run-time power gating

Xu, Hao, Jone, Wen-Ben, Vemuri, Ranga

Year:

2008

Language:

english

File:

PDF, 442 KB

english, 2008

29

[IEEE 2006 Design Automation Conference - San Francisco, CA, USA ()] 2006 43rd ACM/IEEE Design Automation Conference - DyXY - a proximity congestion-aware deadlock-free dynamic routing method for network on chip

Ming Li,, Qing-An Zeng,, Wen-Ben Jone,

Year:

2006

Language:

english

File:

PDF, 2.32 MB

english, 2006

30

[IEEE 2009 Asian Test Symposium - Taichung, Taiwan (2009.11.23-2009.11.26)] 2009 Asian Test Symposium - Analysis of Resistive Bridging Defects in a Synchronizer

Kim, Hyoung-Kook, Jone, Wen-Ben, Wang, Laung-Terng, Wu, Shianling

Year:

2009

Language:

english

File:

PDF, 379 KB

english, 2009

31

[IEEE 2010 23rd International Conference on VLSI Design: concurrently with the 9th International Conference on Embedded Systems Design (VLSID) - Bangalore, India (2010.01.3-2010.01.7)] 2010 23rd International Conference on VLSI Design - Novel Vth Hopping Techniques for Aggressive Runtime Leakage Control

Xu, Hao, Jone, Wen-Ben, Vemuri, Ranga

Year:

2010

Language:

english

File:

PDF, 250 KB

english, 2010

32

[IEEE Comput. Soc. Press 1994 International Conference on Parallel and Distributed Systems - Hsinchu, Taiwan (19-21 Dec. 1994)] Proceedings of 1994 International Conference on Parallel and Distributed Systems - Designing general-purpose fault-tolerant distributed systems-a layered approach

Nayak, A.R., Wen-Ben Jone,, Das, S.R.

Year:

1994

Language:

english

File:

PDF, 453 KB

english, 1994

33

[IEEE 2008 IEEE International Conference on Computer Design (ICCD) - Lake Tahoe, CA, USA (2008.10.12-2008.10.15)] 2008 IEEE International Conference on Computer Design - Run-time Active Leakage Reduction by power gating and reverse body biasing: An eNERGY vIEW

Xu, Hao, Vemuri, Ranga, Jone, Wen-Ben

Year:

2008

Language:

english

File:

PDF, 472 KB

english, 2008

34

Realizing a high measure of confidence for defect level analysis of random testing [VLSI]

Wen-Ben Jone,, Paresh Gondalia,, Gutjahr, A.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1995

Language:

english

File:

PDF, 510 KB

english, 1995

35

[IEEE 22nd IEEE VLSI Test Symposium, 2004. - Napa Valley, CA, USA (25-29 April 2004)] 22nd IEEE VLSI Test Symposium, 2004. Proceedings. - A dual-mode built-in self-test technique for capacitive MEMS devices

Xingguo Xiong,, Yu-Liang Wu,, Wen-Ben Jone,

Year:

2004

Language:

english

File:

PDF, 1.33 MB

english, 2004

36

[IEEE 2013 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu (2013.4.22-2013.4.24)] 2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT) - A configurable bus-tracer for error reproduction in post-silicon validation

Shing-Yu Chen,, Ming-Yi Hsiao,, Wen-Ben Jone,, Tien-Fu Chen,

Year:

2013

Language:

english

File:

PDF, 631 KB

english, 2013

37

[IEEE The Sixth International Conference on VLSI Design - Bombay, India (January 3-6, 1993)] The Sixth International Conference on VLSI Design - CACOP - A Random Pattern Testability Analyzer

Wen-Ben Jone,, Das, S.R.

Year:

1993

Language:

english

File:

PDF, 345 KB

english, 1993

38

[IEEE 1991, International Test Conference - Nashville, TN (Oct. 26-30 1991)] 1991, Proceedings. International Test Conference - Defect Level Estimation of Random and Pseudorandom Testing

Year:

1991

Language:

english

File:

PDF, 760 KB

english, 1991

39

[IEEE 2010 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT) - Kyoto, Japan (2010.10.6-2010.10.8)] 2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems - Logic BIST Architecture Using Staggered Launch-on-Shift for Testing Designs Containing Asynchronous Clock Domains

Wu, Shianling, Wang, Laung-Terng, Yu, Lizhen, Furukawa, Hiroshi, Wen, Xiaoqing, Jone, Wen-Ben, Touba, Nur A., Zhao, Feifei, Liu, Jinsong, Chao, Hao-Jan, Li, Fangfang, Jiang, Zhigang

Year:

2010

Language:

english

File:

PDF, 326 KB

english, 2010

40

Soft-Error-Tolerant Design Methodology for Balancing Performance, Power, and Reliability

Chou, Hsuan-Ming, Hsiao, Ming-Yi, Chen, Yi-Chiao, Yang, Keng-Hao, Tsao, Jean, Lung, Chiao-Ling, Chang, Shih-Chieh, Jone, Wen-Ben, Chen, Tien-Fu

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2014

Language:

english

File:

PDF, 3.38 MB

english, 2014

41

[IEEE 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Arlington, VA, USA (2006.10.4-2006.10.4)] 2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Reliability Analysis of Self-Repairable MEMS Accelerometer

Xiong, Xingguo, Wu, Yu-liang, Jone, Wen-ben

Year:

2006

Language:

english

File:

PDF, 205 KB

english, 2006

42

[IEEE 2012 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu (2012.04.23-2012.04.25)] Proceedings of Technical Program of 2012 VLSI Design, Automation and Test - IMITATOR: A deterministic multicore replay system with refining techniques

Shing-Yu Chen,, Chi Neng,, Geng-Hau Yang,, Jone, Wen-Ben, Tien-Fu Chen,

Year:

2012

Language:

english

File:

PDF, 1.04 MB

english, 2012

43

[IEEE International Conference on Computer Aided Design (ICCAD) - San Jose, CA, USA (5-9 Nov. 2000)] IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140) - Synthesis of CMOS domino circuits for charge sharing alleviation

Ching-Hwa Cheng,, Shih-Chieh Chang,, Shin-De Li,, Wen-Ben Jone,, Jinn-Shyan Wang,

Year:

2000

Language:

english

File:

PDF, 473 KB

english, 2000

44

[IEEE 2006 IEEE International Test Conference - Santa Clara, CA, USA (2006.10.22-2006.10.27)] 2006 IEEE International Test Conference - Fault Modeling and Detection for Drowsy SRAM Caches

Pei, Wei, Jone, Wen-ben, Hu, Yi-ming

Year:

2006

Language:

english

File:

PDF, 820 KB

english, 2006

45

[IEEE Comput. Soc Ninth Asian Test Symposium - Taipei, Taiwan (4-6 Dec. 2000)] Proceedings of the Ninth Asian Test Symposium - Charge sharing fault analysis and testing for CMOS domino logic circuits

Ching-Hwa Cheng,, Wen-Ben Jone,, Jinn-Shyan Wang,, Shih-Chieh Chang,

Year:

2000

Language:

english

File:

PDF, 499 KB

english, 2000

46

Fault Modeling and Detection for Drowsy SRAM Caches

Pei, Wei, Jone, Wen-Ben, Hu, Yiming

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2007

Language:

english

File:

PDF, 1.10 MB

english, 2007

47

[Int. Test Conference International Test Conference 1998 - Washington, DC, USA (18-23 Oct. 1998)] Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270) - A novel combinational testability analysis by considering signal correlation

Shih-Chieh Chang,, Shi-Sen Chang,, Wen-Ben Jone,, Chien-Chung Tsai,

Year:

1998

Language:

english

File:

PDF, 795 KB

english, 1998

48

[IEEE 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT) - Chicago, Illinois, USA (2009.10.7-2009.10.9)] 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Analysis of Resistive Open Defects in a Synchronizer

Kim, Hyoung-Kook, Jone, Wen-Ben, Wang, Laung-Terng

Year:

2009

Language:

english

File:

PDF, 314 KB

english, 2009

49

[IEEE Comput. Soc 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Monterey, CA, USA (3-5 Oct. 2005)] 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05) - Design and analysis of self-repairable MEMS accelerometer

Xingguo Xiong,, Yu-Liang Wu,, Wen-Ben Jone,

Year:

2005

Language:

english

File:

PDF, 476 KB

english, 2005

50

[IEEE 2006 IEEE Instrumentation and Measurement Technology - Sorrento, Italy (2006.04.24-2006.04.27)] 2006 IEEE Instrumentation and Measurement Technology Conference Proceedings - An Improved Fault Simulation Approach Based on Verilog with Application to ISCAS Benchmark Circuits

Das, Sunil R., Mukherjee, Sujoy, Petriu, Emil M., Assaf, Mansour H., Sahinoglu, Mehmet, Jone, Wen-Ben

Year:

2006

Language:

english

File:

PDF, 116 KB

english, 2006